Jarmo Torvinen

Additionally, on latest cortex-rtic, the example does not compile anymore..

With the recent RTIC b87fca3d21d92018ac4d50b200cf8e77cb577028 version the "foo" is printed 4 times, but the timing interval was not 1 second. This is because the example has been tuned to 12MHz...

Sounds good. For now the zmu cli tool and the building has been done with single target only, but adding another architecture would help to remove the possible assumptions from...

To be clear, the support for avr should be separated to its own lib, parallel to zmu_cortexm. This way the main cli can be built with either library. - zmu...

The simulator (or emulator) is not really a cycle-accurate simulator, the pipeline is not actually simulated -- instead it works at bit higher level of abstraction.

Hi, you are correct that there is no lockup state support at all. There is some level of exception support (see especially "impl ExceptionHandling for Processor" in exception.rs). It tries...

That sounds reasonable way to implement this. The code running the simulation can then check the lockup variable and react to that if needed. It would be great if the...

The get_execution_priority() tries to implement the pseudocode function "integer ExecutionPriority()" from ARM V7M (and V6M) reference manuals. As you can see, there are several things that have an effect for...