Jerry Zhao

Results 83 issues of Jerry Zhao

**Type of change**: - [ ] Bug fix - [ ] New feature - [x] Other enhancement **Impact**: - [x] Other **Contributor Checklist**: - [x] Did you set `main` as...

### Background Work - [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/chipyard) - [X] Yes, I searched the [documentation](https://chipyard.readthedocs.io/) ### Feature Description New upstreams are https://github.com/chipsalliance/rocket-chip-blocks https://github.com/chipsalliance/rocket-chip-fpga-shells https://github.com/chipsalliance/rocket-chip-inclusive-cache ### Motivating Example...

### Background Work - [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/chipyard) - [X] Yes, I searched the [documentation](https://chipyard.readthedocs.io/) ### Feature Description There are two `make` variable defaults that we should...

enhancement

### Background Work - [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/chipyard) - [X] Yes, I searched [prior issues](https://github.com/ucb-bar/chipyard/issues) - [X] Yes, I searched the [documentation](https://chipyard.readthedocs.io/) ### Chipyard Version and Hash...

bug

**Impact**: software **Tell us about your environment:** *Chipyard Version:* 1.5.0, Hash: b5d0131 *OS:* Ubuntu 18.04 **What is the current behavior?** Verilator builds in `sims/verilator` fail if the target design does...

bug

**Impact**: docs **Description** We are slowly adding testchip-like features into chipyard designs. Some features that would be good to document are - [ ] Loadmem support in our testchip_tsi implementation...

**Impact**: software **Description** **What is a motivating example for changing the behavior?** v4.034 has incompatibilities with Bison 3.7 #814

Configs with a HW NIC hang silently when run with a no_net_config topology. Preserve user sanity by warning or aborting in such situations.

Perhaps bake a checksum of the config into the FPGA image, and emit a warning if the checksum reported by the FPGA image doesn't match the config the driver was...