javValverde
javValverde
I'm also interested in timing constraints scoped to a module. As an example on vivado: `read_xdc -ref module ` Is there a workaround for this?
I would be very interested in such an integration. At the moment we have a bunch of VUnit testbenches, and I would like to integrate some cocotb testbenches to the...
I tried running it, but it seems to have a couple of problems. It doesn't work in windows and it seems to have some problems with the latest VUnit release....
I would be also be very interested in this feature
Not really, if I don't provide IO constraints (which I don't), the bitstream cannot be generated
Thanks for the reply! I'm analyzing whether I can use fusesoc/edalize as part of our continuous integration, so using a GUI is not an option. I find it quite misleading...
I'm willing to make a PR, but I'm not really sure which is the best way to implement this. Maybe an approach similar to `--pnr None`? Something like `--skip-bitream`?
It would be really helpful if you could give me some hints on how to workaround this problem
It actually sounds great and I look forward to it. I have no problem writing the python bindings myself. Is the interfacing rpc/json based? Or rather calling rust from python?...
And of course, let me know if there is any draft/beta API that I can play with