Jakub Cabal
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Jakub Cabal
There are a few changes that will allow compatibility with SDRAM memory on the CYC1000 FPGA board. I tested your SDRAM controller in HW using my design https://github.com/jakubcabal/sdram-tester-fpga. Thanks
Please, add a feature to convert a VHDL entity definition to a component, instance or signal definitions, using the clipboard? This feature supports the [VHDL Entity Converter extension](https://atom.io/packages/vhdl-entity-converter) for the...