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This applies commit e1619fa64616a05ae962952b7bc6517af9f74dda to the experimental implementation to match the supported implementation. https://github.com/intel/llvm/pull/5471 https://github.com/intel/llvm/pull/5895 Cc: @tyoungsc @shuoniu-intel @rho180 @zibaiwan
Add a memory order parameter to device-side read/write members and default to `sycl::memory_order::seq_cst`. Replace `min_capacity` property with compile-time properties list for use with `SYCL_INTEL_FPGA_data_flow_pipes_properties` extension. Add host pipe read/write members...
See also https://github.com/intel/llvm/pull/5838 Cc: @mkinsner @GarveyJoe @aditikum @rho180 @zibaiwan
OpFunctionPointerINTEL was renamed to OpConstantFunctionPointerINTEL SPIR-V to LLVM IR Translator update: https://github.com/KhronosGroup/SPIRV-LLVM-Translator/pull/1265 SPIR-V Headers update: https://github.com/KhronosGroup/SPIRV-Headers/pull/251 SPIR-V Tools update: https://github.com/KhronosGroup/SPIRV-Tools/pull/4613 Signed-off-by: Dmitry Sidorov
> > @jchlanda, do you think that this failure on NVIDIA GPU https://github.com/intel/llvm/runs/7391421134?check_suite_focus=true is related to this change? This change is not expected to change the default behavior. > >...
Occasionally assert tests hang the card. Host machine stays functional (but overloaded) it seems and card hangs. This is occasional, not every testing triggers that and circumstances are unclear. Hanging...
This PR adds an extension that proposes specializing the `marray` class to support the SYCL complex extension in #6233. The `marray` class is slightly modified, with some inapplicable operators removed...
