Marcus Mellor

UX Improvement: Drag & Drop to sort Applets

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### Current Budgie version Budgie Desktop 10.6.2 ### Use-cases This is one of those pet peeves I've always had with Budgie. Love the DE, but reorganizing applets is unintuitive for...

When trying to run corescore for the Lattice iCE40-HX8K FPGA, I get an error during placement: ``` ERROR: Unable to find legal placement for all cells, design is probably at...

Nonfunctional Discourse Link

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Links to https://pyspice.discourse.group return a DNS error. I'm trying to find a place to ask a few questions, so it would be pretty great if those were working 😁 On...

How to retrieve .measure results

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The main problem I'm having is that I just don't know where to find the results of `.measure` calls after running a simulation using PySpice. I get pretty plots that...

Include .measure results in Analysis with ngspice-shared

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Related to #346 This PR allows PySpice to parse .measure results out of ngspice `run` output and attach them to Analysis objects when using the `ngspice-shared` simulation backend. The code...

Change the unit shortcut generation script to include all SI prefixes, not just those prefixes defined in spice.

Add SoC config

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**Changes in this PR apply only to the _soc_ branch, not main or dev** This PR adds a new configuration file for the Wally RV64GC SoC using BSG's memory controller,...

This PR brings the soc branch up to date with main. This will make #681 a lot less cluttered.

### Please confirm there isn't an open request for this package - [x] I have searched through package addition requests ### Homepage https://xyce.sandia.gov/ ### Maintainer - [x] Would you like...

xdc: Handle get_ports args with braces and spaces

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I ran into an issue using nextpnr-xilinx with a Digilent Arty A7 board (rev E), using [their provided xdc file](https://github.com/Digilent/digilent-xdc/blob/master/Arty-A7-100-Master.xdc). It doesn't seem like the current xdc parsing can handle...