huanghx1990

[kythe] my project root named PRJDIR which is a environment variable, and the filelist all start with $PRJDIR. but run fail with Kythe

1

my working project root dir name $PRJDIR. All filelist line are start from $PRJDIR. Then I run verible-verilog-jythe-extractor --printextraction --filelist $PRJDIR/tb.f in my project root folder. the log as lelow:...

how to intergrated all tools: formatter, language server, kyt, parser etc into vscode, Is there any valid instruction document about those installation guide?

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**Test case** ```systemverilog // Input to the formatter, preferably a reduced test case. ``` Include any options or configuration used. **Actual output** ```systemverilog // This doesn't look right. ``` Include...

extension required many CPU used in TOP

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Hi, I am using this extension, But in my login centos server, my collegues always notice me that my vscode consume CPU greatly, I checked use ps -aux and match...

I have already put svls bin into a path wich add in my own linux PATH environment variable. my linux system could not connect to internet since it is RD...