Arya Reais-Parsi
Arya Reais-Parsi
### Checklist before submitting a bug report - [X] I've updated to the latest released version of the SDK - [X] I've searched for existing [GitHub issues](https://github.com/facebook/facebook-ios-sdk/issues) - [X] I've...
### Description It seems useful to provide a Spice model that includes extracted parasitics at the end of the flow. Proprietary tools readily make this available, and it makes sense...
### Description I have an unpowered macro in an otherwise-powered design. The standard OpenLane flow fails at the "Writing Powered Verilog" step because the sub-macro fails with ``` [ERROR]: during...
It would be nice to read a LEF file on its own in order to verify the abstracts generated for leaf cells. These LEFs are typically quite simple, but can...
## Expected Behavior I want the menu to retain the state of whicever submenus I've expanded. This would make browsing the documentation less frustrating. ## Actual Behavior I start with...
## Expected Behavior I want to discover the layout rules in human-readable form without knowing the rule numbers up front. ## Actual Behavior When I land on the readthedocs.io web...
It's unclear if this _should_ work, but since it seems to work for [at least one other person](https://github.com/RTimothyEdwards/magic/issues/200) I'm going to assume it should. When I try to run the...
In a clean environment, if I try to run simulation with this make command: `$(HAMMER_EXEC) sim -e $(ENV_YML) $(foreach x,$(INPUT_CONFS) , -p $(x)) -p sim_config.yml -p $(src_dir)/rtl_sim_config.lut.yml --obj_dir $(OBJ_DIR)` VCS...
In my `caravel_user_project`-derived project I cannot run `make user_proj_example` or even my own design through `make bfg_mux_test`. Both fail with a 'permission denied' error accessing a path in the docker...
I have cloned caravel_user_project and checked out `gfmpw-0d`. I followed [these](https://github.com/efabless/caravel_user_project/blob/gfmpw-0d/docs/source/index.rst) instructions. I get `sh: flow.tcl: command not found` when trying to compile any designs: ``` make -C openlane user_proj_example...