fpgauserdude
fpgauserdude
**Describe the bug** Using the "type operator" produces a syntax error. **To Reproduce** ```systemverilog typedef enum { UNKNOWN = 0, BYTES, INT, FLOAT } type_e; class Container #(type T); typedef...
**Describe the bug** verible-verilog-syntax apparently cannot parse valid code. **To Reproduce** ```systemverilog module bsg_async_credit_counter #(parameter `BSG_INV_PARAM(max_tokens_p ) , parameter `BSG_INV_PARAM(lg_credit_to_token_decimation_p ) , parameter count_negedge_p = 0 , parameter extra_margin_p =...
I have spent quite a long time trying to get verible to build on windows. I have looked at all the similar issues I can find. I suspect there is...
**Describe the request** I want to use Verible to (finally) provide reliable dependency analysis in SystemVerilog. Using the verible-verilog-syntax command, I am able to very effectively extract dependent modules, packages...
**Describe the bug** Rejects valid syntax. **To Reproduce** ```systemverilog byte result[$]; result = {>>{bytes with [start_indx: end_indx]}}; ``` Include any options used. **Actual behavior:** Syntax error "with" **Expected behavior** See...
The following code produces an error: ``` package test2; typedef enum { UNKNOWN = 0, BYTES, INT, FLOAT } type_e; class Container #(type T); typedef T data_t; function type_e get_type();...
``` module testing #(parameter max_tokens_p , parameter lg_credit_to_token_decimation_p , parameter param_pkg::count_negedge_p test = 0 , parameter extra_margin_p = 0 , parameter check_excess_credits_p = 1 , parameter start_full_p = 1 ,...
``` module bsg_async_credit_counter #(parameter max_tokens_p , parameter lg_credit_to_token_decimation_p , parameter param_pkg::count_negedge_p test = 0 , parameter extra_margin_p = 0 , parameter check_excess_credits_p = 1 , parameter start_full_p = 1 ,...
``` localparam string TESTED_VERSIONS[] = { "2023.1", "2023.2" }; ``` $ svinst test.sv files: parse failed: "test.sv" test.sv:72:42 | 72 | localparam string TESTED_VERSIONS[] = | ^ The syntax is...
There were many dependencies that svinst was not finding in my code, mostly instances of systemverilog packages. There are changed introduced to fix this. Sometimes an instance of a package...