Erhan Kurubas

Enabling ebreaks after reset

6

I wonder which part of the code will be responsible to set `dcsr.ebreak` bits immediately after reset? There are 3 flags inside riscv.c ```c bool riscv_ebreakm = true; bool riscv_ebreaks...

add callback for target reset

2

In this MR `on_reset` callback function added to inform upper layers when reset happened. Reset can be triggered by user request or in an unexpected time. Before displaying an "unexpected...

Supported targets

6

I tried differential OTA on ESP32 but didn't work. ESP32-C3 is OK. Can we clarify exactly which targets are supported for which features?

Add esp_sysview (SEGGER SystemView) component

1

# Checklist - [X] Component contains License - [X] Component contains README.md - [X] Component contains idf_component.yml file with `url` field defined - [X] Component was added to [upload job](https://github.com/espressif/idf-extra-components/blob/master/.github/workflows/upload_component.yml#L18)...