Colleen Bertoni
Colleen Bertoni
Hello, It looks like std::unique_ptr is used without including the `` header. This code worked fine with AMD HIP, but I think it still technically needs the header included. (I...
**Describe the bug** It looks like running SOLLVE VV with split compile and run results in incorrect results with C tests. That is, when I run the "split version" ```...
Hello, This is to report an issue we are seeing with MPICH on Intel GPUs (related to an IOR issue from @pkcoff). If we run a code (reproducer below) which...
Hello, This is to report an issue we are seeing with MPICH on Intel GPUs (related to an IOR issue from @pkcoff). If we run a code (reproducer below) which...
Hello, This is to report an issue we are seeing with MPICH on Intel GPUs (related to an IOR issue from @pkcoff). A small reproducer is below. The code uses...
# Summary This is to report a possible issue / unexpected behavior with AMD-GPU-aware MPICH on an Supermicro AS-4124GQ-TNMI (2x AMD EPYC 7713 with 4 AMD Instinct MI250). @raffenet kindly...
This is for the CUDA version. If the CUDA kernel launch fails, the results will fail validation but still be included in the results, so the "best gflop/s" will be...
Hello, We were comparing the percentage of FP32 peak we get on H100 and A100 for miniBUDE. With the `big5` input (and similarly for the `bm_long` input) we've been seeing...
With MKL version 20250001 on Aurora, it looks like the Level Zero backend needs all devices to be in the context for the MKLshim and interop with MKL layer to...
# Overview Is there a reason `-pie` is passed to the linker with hipcc? We can see that is does by passing `-v` to hipcc: ``` > hipcc -v clang...