bowenxue-intel

> Please add a clang test for the spirv type genrated. You may modify the one from #12820 if that is easier. Added. There are some issues with my clang...

One of the failing LIT tests seems related to the addition of "#include task_sequence.hpp" to sycl.hpp, and the async(ArgsT... Args) function's "Args" param is unused if __SYCL_DEVICE_ONLY__ is undefined... Any...

@intel/dpcpp-tools-reviewers @intel/llvm-reviewers-runtime @sergey-semenov Can I get a review for this PR? Aiming to get this in next week to give ample time to test FPGA backend integration.

@intel/dpcpp-tools-reviewers Can someone please review this PR? This is needed for the FPGA team's next release.

@intel/llvm-gatekeepers PR has been fully approved, please merge whenever possible.

> > @intel/llvm-gatekeepers PR has been fully approved, please merge whenever possible. > > There seem to be compilation issues. Apologies, bad attempt after resolving the merge conflict through Github...

@intel/dpcpp-specification-reviewers Based on prior comments, it seems like most of the discussion points have been addressed and most of you have already rubber stamped it prior to the recent discussions...