Atish Patra
Atish Patra
I checked out the latest riscv-all branch from riscv-linux and started getting following compilation error. Here is my commit log which matches [https://github.com/riscv/riscv-linux/commits/riscv-all] ``` 54d5353c automerging branch "kernel.org-palmer-linux/wip-xilinx_of" into "riscv-all"...
According to the specs, WFI can be used to put the cpu in a low power mode. Any enabled interrupt will return from WFI and the cpu will start executing...
RISC-V Hypervisor design has been evolved not to have a separate hypervisor specific privilege mode. Thus, there is no concept of HBI or HEE anymore. Remove all the references to...
The menvcfg CSR section in priv spec doesn't specify anything about the value at the reset. For some of the extension, the priv spec points to individual specifications(e.g. SSTC, CMO,...
This PR adds support for libfdt and adds local timer node into the device tree. It is just a temporary patch only meant for linux capable boards. I hope future...
Hi, Can we add libfdt in bbl? If we need to add new device tree nodes, that would be bit complex by doing in hand. It has already inbuilt functions...
Currently, we modify fu540 DT for following purpose. 1. Modify M mode IRQ context to 0xFFFFFFF so kernel won't try to parse them. fixed in kernel now https://patchwork.kernel.org/project/linux-riscv/list/?series=193125 2. Change...
The section 3.1.19. Machine Security Configuration (mseccfg) Register says "The definition of the PMM field will be furnished by the forthcoming Smmpm extension. Its allocation within mseccfg may change prior...