Al Martin

If I may, please take a look at this: http://www.jhauser.us/arithmetic/SoftFloat-3/doc/SoftFloat-FAQ.html The second question may provide some insight into how the Underflow flag is calculated. (I believe Spike implements FP using...

Agreed. Please close this issue when the pull request is opened. Perhaps members of the crypto SIG/TG can contribute sample (scalar, vector) crypto code when the time is right.

Instead of individual chapters for each extension, perhaps chapters should be groups of related topics/instructions, e.g. "(scalar) floating-point", "(scalar) integer arithmetic and manipulation", "vector", "crypto", "memory related". However, there will...

minor nit regarding @allenjbaum "... Fregs (pretend not to notice F0 is also the mask) and Vregs": F0 has no special meaning in the floating-point registers. V0 is (usually, but...

Perhaps it would be sufficient to augment the table in unpriv ch28.4 with the zbk* extensions.

The table in Ch28.4 should have the unique instructions from Zbk* added, and then columns added for Zbkb/Zbkc/Zbkx. Overlapping instructions would have checkmarks in two columns, for example clmul would...

Andrew, at the risk of re-opening this can of worms: I realize this uses more opcode space, but did you consider using the rs1+rm fields (bits 19:12) to form an...

Ok. I wish I had known about this extension much earlier so I could have raised this then. Other than not wanting to change _this_ instruction, would this have had...

Don't know if you still need a reply, but see line 323 of MulAddRecFN.scala. It uses outputs of preMul, then feeds inputs of postMul.

The original Verilog code is still available here: http://www.jhauser.us/arithmetic/HardFloat.html