Luke Wren
Luke Wren
Last commit is just to fix a small coverage blackspot in the existing code. I was having far too much fun with the graphs on Codecov
BusSynchronizer is as per Migen except: - number of synchronisation stages is optionally parameterised - timeout retry is optional by setting timeout to 0 (since it is a bit risky,...
Add `ElasticBuffer`. Faithful reproduction of the Migen version, except without the reset synchronisers (since these would normally be per-reset-domain, and there is still some code motion wrt reset/clock domains in...
> I'll try to fix DomainRenamer to work on Modules as soon as possible! Ok, no sweat, I'll rebase + fix as and when :)
Rebased on latest master and fixed up docstrings: - Reflowed to 100 characters - Fixed ReST formatting - Americanized spellings to be consistent with class names - Some edits for...
Thanks :) I've fixed up PulseSynchronizer and Gearbox so far. Unfortunately I'm away on a trip at the moment and don't have all the necessary tools set up on my...
So a flow could be: - If you are writing a block of synchronous logic, you use `sync`, and then apply `DomainRenamer` to yeet it into the correct domain -...
Awesome. I guess the next step for this PR is a lot more testing then. I did note #28, which I guess I could start to take a look at...
Ok that's a good point. Will read through the oMigen library again later today. For the most part it's pretty faithful but mistakes creep in! There are things in the...
I did a side-by-side of oMigen vs current state of my code - `PulseSynchronizer` - Actual logic identical - Number of sync stages in `MultiReg` is parameterised. - Currently I...