Timothée COCAULT
Timothée COCAULT
**Is your feature request related to a problem? Please describe.** When decompiling binaries, I often stumble upon functions using [tail-call optimization](https://stackoverflow.com/questions/310974/what-is-tail-call-optimization). By default, Ghidra will not recognize the tail call,...
This pull request fixes some errors in indirect far jumps/calls, as discussed in https://github.com/NationalSecurityAgency/ghidra/issues/1715, and partially fixed in https://github.com/NationalSecurityAgency/ghidra/pull/1723: - CS is zero-filled when pushed on the stack - The...
Trivial patch to fix the interrupt vectors on ARM Cortex. The offset of some interrupt vectors were not modified after a copy/paste, resulting in identical offsets.
As noted, this is only valid for ARM32 processors without LPAE. Until recently I thought LPAE was the same as Aarch64 but it turns out that no... For these, I...
The ProgramFlags are set by the `program_from_*` functions, and cannot be modified. This makes several features of drgn unavailable if used as a library. This patch adds write access to...
**Is your feature request related to a problem? Please describe.** Hi, I am trying to implement a custom `QlFsMappedObject` with ioctl support. Looking at the class, it seems that I...
### About NDS32 This is a first attempt at implementing the NDS32 processor. In a few words, NDS32 is an architecture made by Andes Technologies. It is a 32-bit architecture,...
Hi ! First, let me thank you for the work you put into this ! I corrected a few details but overall it is very usable. I'm not sure you...
Hi, I'm trying to add support for writing memory related to #324. For now, the changes for the Python API are an optional `write_fn` parameter to `Program.add_memory_segment`, and the method...