Steffen Reith

Smaller SRAMs

5

To support e.g. smaller CPU-architectures as RISC-V (e.g. 16 and 8 bit systems) it would be nice to have smaller sram-macros. Nice sizes would be 4kx16, 1kx16, 4kx8 and 1kx8

Better alignment and clearer structures of std_cell

1

Minor details concerning the clarity of the design of the standard cells. Even if such things have no technical impact, they should be corrected as they confuse people who are...