SOICbite

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erichVK5

Trace width?

1

Hey, nice work! Whats the max. resaonable trace width to route between the inner pads?

milkpirate

Suggested pinouts

1

Hi again. I suggest 2 more pinouts - combination of SWD + UART + FactoryMode detection and same for PIC. They're already presented in my libs. I use these combos...

zharijs

Diptrace version

3

Made a copy in Diptrace. Could push sch and pcb libs if you'd like them here.

zharijs

'Known good' SOIC Clip

7

I've designed this connector into a PCB, I think it's quite a neat solution - thank you for designing it. Unfortunately the SOIC clip I used was a bit flimsy,...

joshtyler

Add JTAG pin specification to README.md

1

I'm designing an adapter and wanted a JTAG pinout for the SOICbite, and figured I might as well contribute it upstream. This PR just adds the JTAG column to the...

0xjmux

what is the purpose of the holes? seems they get get in the way or u have to use thin traces? Just wondering why they are there in the first...

interbiznw

I really like the smart and simple use of the edge test pads. I really don't like deviating from defined standards - especially ones that are 5 years old. Recently...

makergamer