SOICbite
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Trace width?
Hey,
nice work! Whats the max. resaonable trace width to route between the inner pads?
Assuming you're getting JLCPCB (or a manufacturer with similar capabilities to make it), here's what I've found.
JLCPCB Capabilities
- NPTH to Track: 0.2mm
- Min Trace Width: 0.1mm
(NPTH = Non-Plated Through Hole, aka Mechanical Hole)
KiCAD Settings
- Set "Copper to Hole Clearance" to 0.2mm
- Use wide traces for the outer pads (e.g., 0.25mm), especially for power.
- Use 0.15mm traces for passing between the mechanical holes.
One more detail to note is that it may be possible to route trace(s) to the inner pads from the edge-side of the PCB. Perhaps the bigger question is here "how close does this footprint need to be to the edge of the PCB"? Will report back in a month when my clip arrives.