Peter Wang issues

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                                            Peter Wang

Can markmap ignore some of the text

Multiple tables sometimes lead to messy map.

Verilator requires a C++14 or newer compiler

**Type of issue**: Bug Report **Please provide the steps to reproduce the problem:** 1. Install Verilator 5.021 2. Use chisel-template as a test project 3. Run `mill __.test` **What is...

Limitation of Capture Cursor

Nothing happened after ticking `[x] Capture Cursor` . OS: Arch Linux DE: Plasma 6.2.0 Display Protocol: Wayland Version of Weylus: master branch

Need more documentations for project import

There are several designs distributing in `code/code_fpga/fpga` and `v2.0/hw`. Which one should I use to import your design and run experiment? Moreover, the `pci_mig_accelerator_0` IP is missing in both `code/code_fpga/fpga`...