Q Liu

builder from ISO file

1

Hi, I am working on a gem5 project, and I need to create an image file from the arm server iso. I am not sure is there any method I...

work-ver/Variane_testharness

1

hello, I encounter a problem when running Variane_testharness, I used the Verilator 4.104 and riscv64-unknown-elf-gcc (GCC) 9.2.0. I followed the instructions ```shell echo ' #include int main(int argc, char const...

Question about failed everything for RocketTinyCore

6

Hi! I have a question about compiling programs for 32-bit cores. I tried to use Verilator to test Bare Metal RISC-V Programs with TinyCore( Is it 32-bit core, right?). First...

Hi, I encounter a problem when implementing the software design for the Rock BlackBox example. I tried to use the black box in software, and I write the code like...

Traceback (most recent call last): File "4-api_domo.py", line 4, in from cryptoquant.api.api_gateway.build.apigateway_v7 import get_exchange ImportError: DLL load failed: 找不到指定的模块。

Docker build fail

3

### Background Work - [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/chipyard) - [X] Yes, I searched [prior issues](https://github.com/ucb-bar/chipyard/issues) - [X] Yes, I searched the [documentation](https://chipyard.readthedocs.io/) ### Chipyard Version and Hash...

failed to find line: Mapped CXL Memory Device resource

3

Hi, I have already built the kernel. And I try to test the system. But I got the following error: ``` starting qemu. console output is logged to /tmp/rq_0.log guest...

LPDDR5 bug with example_config.yaml

1

I build the ramulator2 in the ubuntu22.04 system. I try to config the LPDDR5 using the following config file: ```yaml Frontend: impl: SimpleO3 clock_ratio: 8 num_expected_insts: 500000 traces: - example_inst.trace...