James Meech

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Thanks I found this helpful

Feature Request: Add FPGA temperature sensors

Does anyone have a bare minimum example C program the samples the XADC on a LiteX generated SoC?

Feature Request: Add FPGA temperature sensors

Thanks!

Feature Request: Add FPGA temperature sensors

Does anyone have any clues on how to use LiteX to generate verilog which allows me to read from the differential of VAUXP[14] and VAUXN[14] on the XADC? I have...

Feature Request: Add FPGA temperature sensors

I've been fighting with Vivado for a week and haven't even been able to get a simple ADC example up and running! My plan was to use what I learnt...

Feature Request: Add FPGA temperature sensors

According to this: https://docs.xilinx.com/r/en-US/ug480_7Series_XADC/XADC-Register-Interface it looks like I need to do: ``` XilinxSystemMonitorChannel(name="vaux14", addr=0x1E, bits=12, desc=[ "Raw VAUX14 value from XADC.", "The external voltage I want to measure", ]), ```...

Feature Request: Add FPGA temperature sensors

Thanks for the pointer that I am heading in the right direction. I tried what I mentioned in the previous message and I can see the CSR is successfully generated...

Feature Request: Add FPGA temperature sensors

This is a slightly better photo of my wiring: ![Image (1)](https://github.com/enjoy-digital/litex/assets/43966357/7bd4e762-8572-42e3-bbee-ce1aeb33193d)

Feature Request: Add FPGA temperature sensors

What is this line in the xadc.py file doing? ``` analog_layout = [("vauxp", 16), ("vauxn", 16), ("vp", 1), ("vn", 1)] ```

Feature Request: Add FPGA temperature sensors

I'm able to get a voltage reading using ``` XilinxSystemMonitorChannel(name="vaux0", addr=0x10, bits=12, desc=[ "Raw VAUX0 value from XADC.", "The external voltage I want to measure", ]), ``` on my hardware...