FRASTM
FRASTM
This patch adds the LL functions to get the address of SPI Tx/Rx reg. Unlike other series, the stm32H7 has two registers for Tx and Rx but no LL function...
The stm32L5 supports the DOUBLE BUFFER Mode for DMA transfer The CUbe API to configure and set the address is for memory **target 0** only LL_DMA_ConfigAddresses or LL_DMA_SetMemoryAddress are for...
This PR adds a `counter value` property to the stm32 LPTIM instance, so that the LPTIM counts without interruption during this period. The value is limited to the range defined...
Prepare the boot/zephyr/flash_map_extended.c to support the stm32 MemoryMapped mode where the application is XiP from a external octo/quad flash memory This is done by setting the CONFIG_STM32_MEMMAP flag which configures...
add the pinctrl DTSi files for the new stm32h7R/S serie stm32h7r3, stm32h7r7 stm32h7s3, stm32h7s7 from the https://github.com/STMicroelectronics/STM32_open_pin_data Follows the PR https://github.com/zephyrproject-rtos/hal_stm32/pull/200
official release from https://github.com/STMicroelectronics/STM32CubeH7RS V1.0.0
Add a function to check if the Quad or Octo NOR flash is in memoryMapped mode to the series: stm23U5x serie stm32H7x serie stm23L5x serie stm23L4x serie
There is no need to disable the irq and backup/restore PRIMASK in the LST_remove_head and LST_remove_tail functions of the lib/stm32wb/hci/stm_list.c because the call to LST_remove_node() will do. If done twice...
update the openocd to include the support of stm32g0 and stm32g4 targets on latest master which now includes the commit [Flash driver for STM32G0xx and STM32G4xx](http://openocd.zylin.com/#/c/4807/)
When the number of SubSeconds exceeds 32bit value during calculations the Alarm still needs to be set with bigger range. This is done with a new RTC_StartAlarm64 function.