Ellen7ions

Results 2 issues of Ellen7ions

I test some cases in the folder "tests", but some cases can't be run correctly, such as "test-grad0.c". The exit code is 8. When debugging, i found div by zero.

Hi @alexforencich , I have seen the file [axi_ram.v](https://github.com/alexforencich/verilog-axi/blob/master/rtl/axi_ram.v), but I didn't see the use of s_axi_wlast. Could u tell me the reason ?