Rong "Mantle" Bao
Rong "Mantle" Bao
Well some Chinese coders will name their vars and write their comments in **Pinyin**, like `YongHuShuJuDao` rather than `UserDataDao`. This should be considered as a culture-specific guideline of shitcode. XD
@z-t-y This is absolutely shitcode and exactly what I mean! :hankey:
Hi @Kyridiculous2, Perhaps you would like to see the new [LibreScore/app-librescore](https://github.com/LibreScore/app-librescore)? Also, joining the discord channel (at #68) helps!
@guysoft I am not a admin of the discord Haha. If #68 does not help there's nothing more I can do.
@SergioBenitez, Changes are made and filed.
Any progress on this? I noticed that almost all STM8 MCUs have been listed as NRND on ST website. Does that has any negative impact on this issue?
I am having this issue as well when defining an inline BlackBox with Chisel 7.0.0-M1. My BlackBox is named `MemuBlackBox`, and the final single-file output as these lines appended: ```verilog...
Same issue with [nmap-ncat 7.95-r0](https://pkgs.alpinelinux.org/package/edge/main/x86_64/nmap-ncat), nmap quits due to this assertion when a second connection is made. Sad to hear no responses from anyone.
Similar to SingularityKChen, I encountered the same problem with my design, in which I had two `UInt`s to multiply. > However, it creates unnecessary sign extensions in the output Verilog...
Hi @coreycb, I come from #9821. Thanks for pointing out the duplication. I wonder if we already have existing workarounds for this? Like, if I upgrade Thunderbird to some future...