BarebitOpenSource

See the "FSUB/FSUBP/FISUB—Subtract" entry in Intel manual. The operands are the same like in case of no-operand FSUBP. Initially reported by bdwashbu.

Suggested by fuzxxl: In early steppings of the 80386, opcodes 0f a6 (xbts) and 0f a7 (ibts) existed. These were removed later on. Ralf Brown's interrupt list claims that they...

From Intel manual, chapter "INTERPRETING THE INSTRUCTION REFERENCE PAGES", "Opcode Column in the Instruction Summary Table": > `NP` — Indicates the use of 66/F2/F3 prefixes (beyond those already part of...

Add "system" instructions and prefixes INVPCID Invalidate Process-Context Identifier PREFETCHW Prefetch Data into Caches in Anticipation of a Write PREFETCHWT1 Prefetch Vector Data Into Caches with Intent to Write and...

CLAC Clear AC Flag in EFLAGS Register STAC Set AC Flag in EFLAGS Register

Discontinued instruction extension, low priority. https://en.wikipedia.org/wiki/Intel_MPX https://linasm.sourceforge.net/docs/instructions/mpx.php List: BNDMK Create a LowerBound and a UpperBound in a register BNDCL Check the address of a memory reference against a LowerBound BNDCU...

https://en.wikipedia.org/wiki/AES_instruction_set#x86_architecture_processors List: AESENC Perform one round of an AES encryption flow AESENCLAST Perform the last round of an AES encryption flow AESDEC Perform one round of an AES decryption flow...

https://en.wikipedia.org/wiki/Intel_ADX List: ADCX Unsigned Integer Addition of Two Operands with Carry Flag ADOX Unsigned Integer Addition of Two Operands with Overflow Flag