ArcheyChen

@Dolu1990 Hello, could you add a primitive similar to display in spinal? such as display("data is ：%d",mydata) Just translate mydata into the variable name in the final Verilog to solve...

Thanks this really helps!

@Dolu1990 Hello, I found that if I try to use `report(Seq("ReqType is","io.newReq"))` to print a enum value. It will print as a normal hex value (like 0,1) but in verilog...

> True ^^ > Fixed now. @Dolu1990 Thanks, but what about printing value in dec or binary? and to print the simulation time?(help to locale the time in wave form)

I try to add `case m: Bits => "%b"` to `ComponentEmitterVerilog.scala ` then I can print out one hot code easily as for printing value in Decimal , I can't...

I understand it now, but when I want to split a value, what is the best way to do so. like I'm trying to split a [addr] to [tag][set][offset] I...

> Right, currently, there is no nice way of handeling (tag,set,offset) := addr like syntaxes, but that would be usefull. > > I'm a bit worying about Cat returning reference...

> I added ways to assign a set of signal at once : > > [3bab908#diff-f3530082c8b1b6e277cf053c28e809197b973eccc0adadcb80178b84eed87bf2R102](https://github.com/SpinalHDL/SpinalHDL/commit/3bab9084945a27d0238ae347ba05c7e1a03f37ad#diff-f3530082c8b1b6e277cf053c28e809197b973eccc0adadcb80178b84eed87bf2R102) > => > (a,b,c) := B"111100" > > > what will happen if Cat...

I guess you are right, `=` not always means reference, because we can't assume every function returns a reference or copy ```scala val a = someFunc(x,y) // Copy or reference?...

> This is very likely due to mem(addr) := 123 which internaly in SpinalHDL already prepear a async read in case of you want to read the mem(addr) statement. That's...