Angelo Jacobo
Angelo Jacobo
Hi, I am using the Xilinx Vivado simulator (Vivado 2022.1 specifically). I am not sure of the commands as I'm using the GUI. Importing all files from this repository, setting...
Hi @nuclearrambo , would it be possible to add a reset logic in Microblaze such that the reset will only be released when UberDDR3 is done calibrating? The built-in self-test...
Hi, closing this issue as this is now resolved. A new parameter `SKIP_INTERNAL_TEST` is added to skip built-in self test. UberDDR3 can now also be easily added to Vivado IP...
Adding @regymm on this thread for possible support on openxc7.
Thanks @regymm. Hi @machdyne, apologies for the delay on my reply. One suggestion which worked on my side now is to use the [nix toolchain](https://github.com/openXC7/toolchain-nix), I used the first method...
Hi @machdyne, I created a new demo project folder "sechzig_mx2": https://github.com/AngeloJacobo/UberDDR3/tree/main/example_demo/sechzig_mx2 I copied the files from [your UberDDR3 fork](https://github.com/machdyne/UberDDR3/tree/main/example_demo/sechzig_mx2). I modified some few things like: - No python scripts anymore...
Hi @machdyne , please let me know if the [example demo for sechzig_mx2](https://github.com/AngeloJacobo/UberDDR3/tree/main/example_demo/sechzig_mx2) works on your end so we can close this issue. Thank you!
Hi @kjhhgt76 , please try my suggestion on this comment: https://www.openiphub.com/post/getting-started-with-uberddr3-part-1-post-2?commentId=618a8802-c0d0-434a-81aa-735e6d42d221#viewer-oommd1130083 If it works, please let me know so I can add this instruction on this repo.
Hi @thomasnormal, the main testbench for the UberDDR3 simulation is this: https://github.com/AngeloJacobo/UberDDR3/blob/main/testbench/ddr3_dimm_micron_sim.sv You can dump the whole testbench/ directory to Vivado and let it infer the hierarchy. You can follow...
Hi @ztachip, looking on this reference manual, you are right nexys video is 16 bit wide for DDR3: https://digilent.com/reference/programmable-logic/nexys-video/reference-manual The example demo only stores 8 bits from UART, so `BYTE_LANES...