Alexbruliau

TX_STACK_FILL ((ULONG) 0xEFEFEFEFUL) works for a 64 bits port like risc-V64 ? In my case, it is simply expanded to 0x00000000EFEFEFEFUL and the task checking always failed..

FPU support RISCV-64

1

**Describe the bug** FPU is deactivated inside tx_thread_schedule.S v6.4.1  Is it the correct behavior ? I would expect the FS bit from the mstatus not to be reset to...

nx_packet_allocated return false for RISCV-64 bits arch

1

Hello, I am encountering an issue when I used nx_packet_allocate because ULONG is considered to be 8 bytes for the RISCV-64 bits architecture. It worked perfectly on my previous target...

nx_packet_data_append overflows for a payload size set to max to achieve MTU ?

2

Hello, I was wondering what will happens if nx_packet_data_append applied on a previously TCP packet with a payload set to (1500 - 20(ip_header) - 20(tcp_header). I have the feeling that...