yosys topic

XCrypto: a cryptographic ISE for RISC-V

scarv

Arduino compatible – Cortex M4F & FPGA Development Board

dadamachines

sliding DFT for FPGA, targetting Lattice ICE40 1k

mattvenn

Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe

ECP5-PCIe

FPGA tool performance profiling

chipsalliance

Plugins for Yosys developed as part of the F4PGA project.

chipsalliance

Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.

efabless

Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)

tmeissner

SCARV: a side-channel hardened RISC-V platform

scarv

A Dockerfile with a collections of ready to use open source EDA tools: Yosys, SimbiYosys (with Z3, boolector and Yices2), nextpnr-ice40, netxpnr-ecp5, nextpnr-gowin, Amaranth HDL, Silice and Verilator...

vmunoz82