Consider using variable (scalable) vectors for more portable code that can adjust to width of vector.

[baryluk]

I know it would throw a wrench into entire design, but take a look into ARM SVE ISA.

I think it could be done tho with good SIMD design, and not be hard to implement.

The size of loads, strides, width of vectors, and naming of vectors would need to be exposed. (They can be constants and evaluate to constant if the JIT/Interpreter knows what these values are, i.e. when using SSE2/AVX/NEON for example). Not only that it will automatically select wides available ISA on a hardware. I.e. it will use AVX512 if available, then fallback to AVX2, and then to SSE2 if needed, and in all cases generate pretty good code.