shareefj

**Edit**: don't read this, see the next comment. @olofk I've just been looking at how this works and thought I'd ask questions here so that at least it is semi-documented....

Okay, I realise I've completely misunderstood how this works. In browsing the Git log I found your commit that mentions [PEP420](https://peps.python.org/pep-0420/) which got me reading... So the way to create...

@olofk Just wanted to resurrect this discussion. You recently merged the Filelist backend that I opened a PR on (https://github.com/olofk/edalize/pull/289) but we both forgot that it required an accompanying change...

Where does it write the filelist?

Can we get some feedback from others about whether this fits their needs before you push this. It doesn't fit ours so we won't be using it. I'll tidy up...

@olofk I'm going to write a script that wraps this behaviour of the new `flist` flow and enables the filelist to be dumped to an arbitrary location. Would you be...

This diff shows a working example. I fixed `flist` to create absolute paths, which is required for a generic filelist that can be reused outside of Fusesoc, and then added...

I switched to the xlnx_rel_v2022.1 branch and this succeeds. ``` createdts -hw ../kv260_hardware_platform/top_fpga_kv260.xsa -zocl -platform-name genesee -git-branch xlnx_rel_v2022.2 -overlay -compile INFO: Downloading DTG repo from https://github.com/Xilinx/device-tree-xlnx.git to /home/shareefj/git/genesee_fpga/workspace/kv260_vitis_platform Cloning into...

I'm guessing the relevant fix is the following where the script returns if the PL has no IPs. ``` git diff -r 14cc0faa539470dea24b196d278742b118a46b6d -r 0124aad7d9f0e50062aa79189c80f183956987e2 device_tree/data/device_tree.tcl @@ -701,6 +741,18 @@...

@JH989876525 Thanks Jerry, that seems to have fixed the issue. So anyone from Xilinx, can you update your instructions or fix this issue if it shouldn't happen? The offending parts...