wildcat
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schoeberl
An implementation of RISC-V
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wildcat issues
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It has come to our attention that to run any OS on wildcat the pipeline has to be upgraded. Wildcat is currently running a very simple version of RISCV32I and...
The instruction memory stall is implemented and should work. However, the data memory stall is not (yet) implemented, but needed for the group implementing a data cache.
