cortex-m
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rust-embedded
Cache maintenance operations require reference to self
Various cache maintenance-related operations require a self reference, which means that it is not possible for a HAL or other peripherals to clean/invalidate and/or perform other cache related operations without owning the SCB.
In the context of DMA, this can be a stumbling block, as DCACHE needs to be cleaned and invalidated before and after transfers (if it is enabled).
Is it possible to refactor the cache maintenance functions to not require a self reference so that they can be called statically as cortex_m::peripherals::scb::invalidate_dcache_by_address()?
