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How to Reduce System Clock Advancement Speed in Multithreaded Mode?

Open alpha-beta-user opened this issue 1 year ago • 3 comments

I noticed that when starting the operating system, the system clock advances very quickly. This issue occurs in multithreaded mode with the synchronization policy set to multithread-quantum.

How can I reduce the system clock advancement speed?

Below is the boot log for reference:

[ 0.000000] earlycon: pl11 at MMIO 0x0000000028001000 (options '') [ 0.000000] bootconsole [pl11] enabled [ 0.000000] percpu: Embedded 21 pages/cpu @(ptrval) s55904 r0 d30112 u86016 [ 0.000000] Detected PIPT I-cache on CPU0 [ 0.000000] CPU features: detected: Hardware dirty bit management [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 129024 [ 0.000000] Kernel command line: console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/ram0 rw [ 0.000000] Dentry cache hash table entries: 65536 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 32768 (order: 6, 262144 bytes) [ 0.000000] Memory: 472152K/524288K available (2110K kernel code, 192K rwdata, 520K rodata, 320K init, 223K bss, 52136K reserved, 0K cma-reserved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=1. [ 0.000000] Tasks RCU enabled. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GICv3: Distributor has no Range Selector support [ 0.000000] GICv3: no VLPI support, no direct LPI support [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000029b00000 [ 0.000000] arch_timer: cp15 timer(s) running at 1.00MHz (virt). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns [ 0.044283] sched_clock: 56 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns [ 1.925849] Console: colour dummy device 80x25 [ 2.193497] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=4000) [ 2.511342] pid_max: default: 32768 minimum: 301 [ 2.942518] Mount-cache hash table entries: 1024 (order: 1, 8192 bytes) [ 3.330544] Mountpoint-cache hash table entries: 1024 (order: 1, 8192 bytes) [ 9.335932] ASID allocator initialised with 32768 entries [ 9.814075] rcu: Hierarchical SRCU implementation. [ 11.077883] smp: Bringing up secondary CPUs ... [ 11.523588] smp: Brought up 1 node, 1 CPU [ 11.852665] SMP: Total of 1 processors activated. [ 12.235429] CPU features: detected: GIC system register CPU interface [ 13.026704] CPU features: detected: Privileged Access Never [ 13.599891] CPU features: detected: LSE atomic instructions [ 13.835683] CPU features: detected: User Access Override [ 14.320355] CPU features: detected: 32-bit EL0 Support [ 16.883358] CPU: All CPU(s) started at EL1 [ 17.301341] alternatives: patching kernel code [ 27.945730] devtmpfs: initialized [ 32.448892] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 32.989147] futex hash table entries: 256 (order: 2, 16384 bytes) [ 36.398270] vdso: 2 pages (1 code @ 0000000056441a52, 1 data @ 0000000026e33fc3) [ 36.791155] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. [ 37.589430] DMA: preallocated 256 KiB pool for atomic allocations [ 37.851772] Serial: AMBA PL011 UART driver [ 42.372094] 28001000.uart: ttyAMA0 at MMIO 0x28001000 (irq = 6, base_baud = 0) is a PL011 rev1 [ 43.417939] console [ttyAMA0] enabled [ 43.417939] console [ttyAMA0] enabled [ 43.824276] bootconsole [pl11] disabled [ 43.824276] bootconsole [pl11] disabled [ 54.065891] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages [ 57.139440] clocksource: Switched to clocksource arch_sys_counter [ 64.658725] hrtimer: interrupt took 9335000 ns [ 122.534842] Unpacking initramfs... [ 510.044485] Freeing initrd memory: 14336K [ 516.285416] workingset: timestamp_bits=62 max_order=17 bucket_order=0 [ 537.383665] io scheduler noop registered [ 537.807424] io scheduler deadline registered [ 539.323505] io scheduler cfq registered (default) [ 540.216933] cacheinfo: Unable to detect cache hierarchy for CPU 0 [ 552.816329] Register mapping successful [ 573.022320] Freeing unused kernel memory: 320K [ 576.085409] Run /init as init process

alpha-beta-user avatar Mar 31 '25 03:03 alpha-beta-user

Add a 'realtimesync' to your design.

markfoodyburton avatar Mar 31 '25 06:03 markfoodyburton

Thank you for your response! Could you clarify if adding realtimesync refers to configuring it via the QEMU -rtc parameter, or if additional synchronization settings are required within the system? If it's a QEMU parameter, would something like -rtc base=localtime,clock=host be the correct way to synchronize with the host time?

Looking forward to your guidance. Thanks!

alpha-beta-user avatar Mar 31 '25 06:03 alpha-beta-user

it's a systemc component : https://github.com/quic/qbox/tree/main/systemc-components/realtimelimiter

markfoodyburton avatar Mar 31 '25 06:03 markfoodyburton