libsimdpp

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lion117

Example code for gettings started with library

1

Added example code for getting started with using `types`, `load` and `store` with libsimdpp.

sahmad98

111qqz

How can we combine with Intel® SSE2 (Streaming SIMD Extensions 2)?

4

Hi, I have existing code in Intel SIMD [SSE2](https://scc.ustc.edu.cn/zlsc/tc4600/intel/2015.1.133/compiler_c/GUID-7EC08804-66F5-4F9C-95AC-32546F8BCD9B.htm), how can I use API of libsimdpp if the variable I have is in SSE2, for example [_mm_set_epi32](https://scc.ustc.edu.cn/zlsc/tc4600/intel/2015.1.133/compiler_c/GUID-7EC08804-66F5-4F9C-95AC-32546F8BCD9B.htm)? Is there any...

ardianumam

The fused multiply add/sub operations are unavailable for some instruction sets and result in a linker error that is hard to track down. There is also no preprocessor definition that...

Jazzdoodle

Compiler error with -std=c++17 on gcc

2

``` ../../third-party/libsimdpp/simdpp/types/empty_expr.h: In instantiation of ‘simdpp::arch_sse3::mask_int32::operator simdpp::arch_sse3::uint32() const [with unsigned int N = 4]’: ../../third-party/libsimdpp/simdpp/detail/insn/cmp_neq.h:195:52: required from here ../../third-party/libsimdpp/simdpp/types/empty_expr.h:220:52: error: could not convert ‘((const simdpp::arch_sse3::mask_int32*)this)->simdpp::arch_sse3::mask_int32::e’ from ‘const simdpp::arch_sse3::mask_int32’ to ‘simdpp::arch_sse3::uint32’...

abique

auto foo24(float64x2 a) { return sign(a); } generates: ``` 0000000000000000 : 0: 6f00e402 movi v2.2d, #0x0 4: d10383ff sub sp, sp, #0xe0 8: 910383ff add sp, sp, #0xe0 c: 4e221c00...

peabody-korg

uses vrndnq_f64(), which is round to nearest. should use vrndmq_f64(), which is round towards -inf.

peabody-korg

Compiler error with -std=c++17 on clang

1

error.cpp: #define SIMDPP_ARCH_X86_SSE2 #include "simdpp/simd.h" Compiling with $ clang++ -std=c++17 -c -I libsimdpp error.cpp produces the following error: ``` In file included from error.cpp:3: In file included from libsimdpp/simdpp/simd.h:19: In...

jarnoharno

Slowdown on several vector variations

2

[MSVC] (CPU: Xeon 1231v3) I noticed slowdown when I was experimenting with several combinations of matrix sizes and simdpp instruction sets. I implemented matrix multiplication in 3 different ways: plain...

TheTryton