[FPGA] FPGA Simulator support for loop_coalesce, loop_ii and spec itrs

[bowenxue-intel]

Existing Sample Changes

DirectProgramming/DPC++FPGA/Tutorials/Features/loop_initiation_interval DirectProgramming/DPC++FPGA/Tutorials/Features/speculated_iterations DirectProgramming/DPC++FPGA/Tutorials/Features/loop_coalesce

Description

Add support for running loop_initiation_interval, loop_coalesce, and speculated_iterations on the FPGA simulator. Uses ext::intel::fpga_simulator_selector class to choose the simulator. Reduced data sizes to ensure reasonable execution times, as simulator is 1000-10000x slower than hardware

Type of change

• [X] New feature (non-breaking change which adds functionality)

How Has This Been Tested?

This has been run manually on Linux and Windows

• [X] Command Line
• [ ] oneapi-cli
• [ ] Visual Studio
• [ ] Eclipse IDE
• [ ] VSCode
• [X] When compiling the compliler flag "-Wall -Wformat-security -Werror=format-security" was used