Question: Is it possible to access Altera FPGAs with Level-Zero?
Following the spec: https://spec.oneapi.com/level-zero/latest/core/INTRO.html
Level-zero SPEC also works for spatial architectures.
When looking at the zeInit function (https://github.com/oneapi-src/level-zero/blob/master/include/ze_api.h#L567), the current implementation only supports GPU.
typedef enum _ze_init_flag_t
{
ZE_INIT_FLAG_GPU_ONLY = ZE_BIT(0), ///< only initialize GPU drivers
ZE_INIT_FLAG_FORCE_UINT32 = 0x7fffffff
} ze_init_flag_t;
Are there any plans to include FPGAs?
Related to FPGAs, if I want Level-Zero and SPIRV, I guess I would need at least OpenCL 2.1? However, I see that the latest Quartus still implements OpenCL 1.0. Any plans on this front?
Thanks Juan
Currently (v1.5) there's also:
ZE_INIT_FLAG_VPU_ONLY = ZE_BIT(1), ///< only initialize VPU drivers
Does this flag cover FPGAs? or is it for a specific type of GPU?
thanks @eero-t for the follow-up
Are there any plans to include FPGAs?
as @eero-t noted, entry for VPU has been already added. Entries for other accelerators could be added as driver implementations become available and the request is made. Whether an FPGA driver is implemented or not is outside of the scope of the loader, as the loader is driver/vendor agnostic.
Related to FPGAs, if I want Level-Zero and SPIRV, I guess I would need at least OpenCL 2.1? However, I see that the latest Quartus still implements OpenCL 1.0. Any plans on this front?
this is also outside the scope of the loader and more related to a potential implementation of an FPGA L0 driver. I would suggest to post directly in a forum associated with Quartus to find out about that.