Miguel O
Miguel O
V2S work to continue in M5.
Moving to M5 as we are not expecting any further RTL changes as part of M4.
Hi @matutem thanks for your feedback! Here are some initial responses to your previous questions/concerns: > * Please explain what you mean by `FC`. Sorry, I was mixing Caliptra terminology....
There is some work done to enable splicing of info pages in the FPGA. I can work on adding details on the remaining efforts. We can discuss priorities once we...
Moving to M5 as we are not expecting any further RTL changes as part of M4.
Hi @github-gcontributor, Can you also do the following: 1. Add Bazel target to `sw/device/tests/BUILD` 2. Update the commit title and text to describe the changes being introduced in this PR....
Hi @nasahlpa, can you take a look at the test implementation to ensure it matches the intended test point description? Thanks!
CI has the following error: ``` E00003 power_virus_systemtest.c:1468] DIF-fail: dif_pinmux_pad_write_attrs(&pinmux, kTopEarlgreyDirectPadsSpiHost0Sck, kDifPinmuxPadKindDio, in_attr, &out_attr) returns 13 ``` Code: https://github.com/lowRISC/opentitan/blob/7e34e67ade0717418930ecbfa4bee30ba44979ed/sw/device/lib/dif/dif_pinmux.c#L307-L309 This only happens in the `sival_rom_ext` configuration. Need to check if...
Thanks @a-will for your quick response. @sha-ron, you will probably want to constraint this configuration to the follow device types: * `kDeviceSilicon` * `kDeviceSimDV`
Hi @nasahlpa, can you take a look at the test implementation to ensure it matches the intended test point description? Thanks!