Segment shadow updating

[tathanhdinh]

The issue is reserved for the update of segment shadow register, it relates to #288, #332, #325 (a preparing commit is #328). The problem is that whenever a segment register is updated, the MMU will update also the hidden part (i.e. segment shadow) of this register. For example, consider the instruction:

0x7715b958    ea 5f b9 15 77 33 00     jmp far 0x33:0x7715b95f

which makes the code segment register CS to be changed to 0x33 (and PC to 0x7715b95f). The MMU then uses the value of ((the first 13 bits of) CS as index to load the correspondent segment descriptor in the GDT (or LDT depending on the third bit of CS), the segment descriptor then is used to update segment shadow (of CS).

In summary, the logic is:

• check the third bit (of CS) to get the corresponding descriptor table (0 = GDT, 1 = LDT)
• compute the linear address: GDTR (or LDTR) + index * 8 (since each segment descriptor has size 8 bytes), where index is the value of the first 13 bits of CS
• read the segment descriptor (8 bytes) at this address and update the segment shadow of CS.