Add a progressive backoff mechanism for barriers.

[devinamatthews]

The mechanism(s) used for backoff must be defined by the configuration or configuration family. Up to three successive mechanisms are supported (e.g. pause/sched_yield/sleep).

Example (in config/<family>/bli_family_<family>.h):

#define BLIS_BARRIER_BACKOFF_1 30    // number of times to loop
#define BLIS_BARRIER_YIELD_1 pause();pause();pause();

//#define BLIS_BARRIER_BACKOFF_2    not needed, the last mechanism is looped forever 
#define BLIS_BARRIER_YIELD_2 sched_yield();

This PR supplants #82 and potentially addresses #604 (family-specific behavior still needs to be decided upon and implemented).

Families needing implementations:

• [ ] Intel
• [ ] AMD (same as Intel?)
• [ ] ARM (v7 same as v8?)
• [ ] POWER

[jeffhammond]

Jim Cownie wrote about this topic here: https://cpufun.substack.com/p/to-sched_yield-or-not-to-sched_yield.