Tim Fischer

What version of QuestaSim are you using? Because I cannot reproduce your issue on my machine.

I can reproduce the error with this version, but I don't have a fix for it. I am using a newer version of QuestaSim (2023.4) which works fine for me,...

Hi, I have never tried to map it onto an FPGA and also don't have too much experience with them to tell you where the problem could be unfortunately.

I merged a fix https://github.com/pulp-platform/FlooNoC/pull/36 for an elaboration error that I experienced during synthesis. I am not sure if that is the same problem you have, but you can maybe...

I know, I currently don't have the time to update the documentation. However, there are a couple of other examples in the [`floogen/examples`](https://github.com/pulp-platform/FlooNoC/tree/main/floogen/examples) folder

I fear this is currently not well supported. If you want to use XY routing, then you need to instantiate an array of routers and endpoints. Because _FlooGen_ infers the...

Unfortunately, we don't provide a verilator environment at the moment, since some of our verification IPs use SystemVerilog constructs that are not yet compatible with Verilator. The main IPs should...

There are a lot of them, but mainly in the dependencies of FlooNoC. You can try the following to get the list of errors from verilator: ``` verilator `bender script...

Thanks a lot @solomatnikov for the efforts! At the moment I am very busy with other projects, but I will put a verilator environment on the roadmap for FlooNoC.

This is handled in the `floo_rob_wrapper`, with AXI ID counters. I am not sure what you mean about stalled responses. The responses are never stalled, but the requests are. Essentially,...