Connect 'Internal' Signals
Ist:
Right now it's only possible to a single term to describe a network. Seperate terms will result in seperate network.
Example:
{ assign:
["out",
["OR",
["AND", ["INV", "a"], "b"],
["NAND", ["INV", "b"], "a"]
]
]
}
Defines a network of 5 gates, no intermediate (internal) signals are given. Result is:

Soll:
It should be possible to define networks in seperate terms (maybe with some kind of blocking) like this:
{ assign:
[
["I1", ["INV", "a" ]],
["I2", ["INV", "b" ]],
["I3", ["AND", "I1","b" ]],
["I4", ["NAND","I2","a" ]],
["out", ["OR", "I3","I4"]],
]
}

Every signal name that is not defined in a term as result or used as an input is considered an external input. Names only defined as output in terms and not used as input in other terms are considered external output.
Right now a seperate definition of the 5 terms above results in 5 seperate schematics:

Eventually it might be useful to have an optional way to declare external input signals. See wavedrom/logidrom#25