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Added Makerchip's Visual Debug.

stevehoover avatar stevehoover

Please add OSVVM to Other Simulation Tools

JimLewis avatar JimLewis

Add sv2v tool?

https://github.com/zachjs/sv2v This is SystemVerilog to Verilog tool.

dev-pts avatar dev-pts

Seperated into languages and tools.

#6 Separated into languages and tools. @drom

eddygta17 avatar eddygta17

separate RTL projects, tools into separate lists

2 comment

Open cores: RTL projects and libraries Tools: Build systems, visualization Verilog / VHDL implementations

drom avatar drom

hacktoberfest

Add info on UVVM and hbs

m-kru avatar m-kru

add svlint to Other Design Automation tools

yangm2 avatar yangm2

add CRAVE (AntMicro branch) to Other Simulation tools

yangm2 avatar yangm2

fix typo

fix typo in `peakhdl` description

yangm2 avatar yangm2

Add seqlogic to MetaHDL/Python section

1 comment

cjdrake avatar cjdrake

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