CyrIng

> All my previous attempts were fruitless, just tried again with the dev version of the archlinux ISO and the current master branch. No luck. Haven't been able to get...

> > Don't you have any kernel log (dmesg) to see where the Atom has crashed in the driver callflow ? > > Great point! There is something that changed...

Great to see that screenshot of `Bonnell` The last register `MSR_TEMPERATURE_TARGET` really hurts processor. And we are left without a `TjMax` which is hard-coded to `100°C` We can fine tune...

@svmlegacy Code changes made so far are available in commit 0794238d5e9bdeae6252dff46f8dd001f5c12294 The monitoring loop for `Bonnell` is very basic and now need to be affine with architectural MSR registers listed...

And this [datasheet](https://www.intel.com/content/dam/doc/datasheet/atom-330-datasheet.pdf) also -;) * _For information_, Low Power Features `P_LVLx I/O` So far we don't have the I/O Base Address register: ``` |- Core C-States |- C-States Base...

> Good News! The develop branch now works as-is for the Atom 330. > > Reported temperature looks good. Offsetting by another 15°C would put it sub-ambient. Tjmax of 85°C...

In [datasheet](https://www.intel.com/content/dam/doc/datasheet/atom-330-datasheet.pdf), table `3-2`  * a few samples, from the bottom table to the top: * `VID` converted in Decimal * can you replace code with this formula: ```c...

According to Xeon scalable [volume 2](https://www.intel.com/content/www/us/en/processors/xeon/xeon-technical-resources.html) , the IMC could be on PCI `BUS:2` One way is like function `Jasper_Forest_IMC()` ... https://github.com/cyring/CoreFreq/blob/6fcba8da6d8a2de75a248c040b14f3cb75869cd3/corefreqk.c#L4513 ... where any memory controller is scanned on...

> Linux: > |- Release [3.10.0-957.el7.x86_64] If you boot an updated kernel we _may_ read more `lspci` identifiers I suggest my [live](https://github.com/cyring/CoreFreq/wiki/Live-CD) ISO which is Linux `5.15` based. This image...

EDIT: ``` lspci -nn | grep -e "Controller" -e "Memory" ``` is probably masking the bus `2` Memory BAR is more often remapped from PCI root