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[Bug-Candidate]: redundant control flow edge after try block
Describe the issue:
when I print the cfg, it gives an edge from node 1 to node 8 (from try head to b += 123)
Code example to reproduce the issue:
pragma solidity ^0.8.0;
contract D{
function divide(uint256 a, uint256 b) public returns (uint256) {
require(b != 0, "Division by zero");
return a / b;
}
function safeDivide(uint256 a, uint256 b) public returns (uint256, string memory) {
try this.divide(a, b) returns (uint256 result) {
a++;
} catch Error(string memory reason) {
b++;
} catch (bytes memory) {
a += 8;
}
b+=123;
}
}
Version:
0.10.3
Relevant log output:
No response
Do you mind uploading the CFG?
digraph{
0[label="Node Type: ENTRY_POINT 0
"];
0->1;
1[label="Node Type: TRY 1
EXPRESSION:
result = this.divide(a,b)
IRs:
TMP_3(uint256) = HIGH_LEVEL_CALL, dest:this(address), function:divide, arguments:['a', 'b']
result(uint256) := TMP_3(uint256)"];
1->2;
1->4;
1->6;
1->8;
2[label="Node Type: CATCH 2
"];
2->3;
3[label="Node Type: EXPRESSION 3
EXPRESSION:
a ++
IRs:
TMP_4(uint256) := a(uint256)
a(uint256) = a (c)+ 1"];
3->8;
4[label="Node Type: CATCH 4
"];
4->5;
5[label="Node Type: EXPRESSION 5
EXPRESSION:
b ++
IRs:
TMP_5(uint256) := b(uint256)
b(uint256) = b (c)+ 1"];
5->8;
6[label="Node Type: CATCH 6
"];
6->7;
7[label="Node Type: EXPRESSION 7
EXPRESSION:
a += 8
IRs:
a(uint256) = a (c)+ 8"];
7->8;
8[label="Node Type: EXPRESSION 8
EXPRESSION:
b += 123
IRs:
b(uint256) = b (c)+ 123"];
}