ckormanyos
target stm32h7a3 not clocking fast enough
As mentioned in #283, the PLL is not properly set up for target stm32h7a3.
The purpose of this issue is to get the stm32h7a3 nucleo board running at full 280 MHz.
Draft is cycling in #317. This is based partially on the excellent bare-metal initialization of Blinky_Nucleo_H7A3 from @chalandi (many thanks Amine).
Some work still needs to be done on the C++ metal implementation of D/I cache, as these simply use the C implementation at the moment.
work still needs to be done on the C++ metal implementation of D/I cache
But I'll leave D/I-cache implementation in the current C-style and maybe pick up the full C++-ification in the future.