cirosantilli
oi
navegando aleatoriamente pelo GitHub achei esse repo https://github.com/isaacs/github e vi teu nome e lembrei: soa familiar! um abc.
Thomas! Are you doind light chips? I find it amazing that we can put lasers in semiconductors. There was a short presentation here at work about it.
I'm very curious to try out physical simulations of stuff. I saw your GitHub pins, they are very interesting. Does https://github.com/lukasc-ubc/SiEPIC_EBeam_PDK give physically accurate results? Are you using it on your research? (edit: OK, saw your lab has a fork, so I'm guessing yes :-))
@lukasc-ubc is destroying it with that open source stuff. I wish there was a "simulated vs experimental observation" graph on the README to show that simulations actually work. First link of REAME is broken.
klayout also looks cool, I'll try it out some time. @klayoutmatthias can it do any type of design rule check or cell characterization?
@thomaslima also, have there been any commercial deployments of that kind of tech? Do you think it will make money in the next 10 years? :-) I hope you guys succeed.
Some lightweight DRC engine is there. What do you mean by "Cell
characterization"?
Matthias
Quoting Ciro Santilli 包子露宪 六四事件 法轮功 [email protected]:
Thomas! Are you doind light chips? I find it amazing that we can put
lasers in semiconductors. There was a short presentation here at
work about it.I'm very curious to try out physical simulations of stuff. I saw
your GitHub pins, they are very interesting. Does
https://github.com/lukasc-ubc/SiEPIC_EBeam_PDK give physically
accurate results? Are you using it on your research? (edit: OK, saw
your lab has a fork, so I'm guessing yes :-))@lukasc-ubc is destroying it with that open source stuff. I wish
there was a "simulated vs experimental observation" graph on the
README to show that simulations actually work. First link of REAME
is broken.klayout also looks cool, I'll try it out some time. @klayoutmatthias
can it do any type of design check or cell characterization?-- You are receiving this because you were mentioned. Reply to this email directly or view it on GitHub: https://github.com/cirosantilli/chat/issues/37#issuecomment-434217012
Just saw these messages. I had just dropped a random hello after years without seeing you. LOL
Yes I work with photonic integrated circuits, but lasers are not the coolest part about them. =) Yes there are many examples of photonic chips deployed, mostly in telecom and sensing. Market is growing as well as layout, sim and verification tools.
@klayoutmatthias
Some lightweight DRC engine is there. What do you mean by "Cell characterization"?
As in, you give the 3D description of a cell in a standard cell library, and get as output the electrical parameters required for digital circuit synthesis. I think the output format is Libiberty: https://en.wikipedia.org/wiki/Standard_cell#Library but not sure.
Yes, this is a term I understand. However, I you speak about CMOS
logic where .lib files apply, cell characterization is much more than
a layout operation. It involves transistor device and passive
component extraction and the ability to turn this extracted schematic
into a timing model. Specifically the latter is the domain of circuit
modelling and far beyond the scope of a layout engine.
Quoting Ciro Santilli 包子露宪 六四事件 法轮功 [email protected]:
@klayoutmatthias
Some lightweight DRC engine is there. What do you mean by "Cell
characterization"?As in, you give the 3D description of a cell in a standard cell
library, and get as output the electrical parameters required for
digital circuit synthesis. I think the output format is Libiberty:
https://en.wikipedia.org/wiki/Standard_cell#Library but not sure.-- You are receiving this because you were mentioned. Reply to this email directly or view it on GitHub: https://github.com/cirosantilli/chat/issues/37#issuecomment-434571340
Yes, this is a term I understand. However, I you speak about CMOS logic where .lib files apply, cell characterization is much more than a layout operation. It involves transistor device and passive component extraction and the ability to turn this extracted schematic into a timing model. Specifically the latter is the domain of circuit modelling and far beyond the scope of a layout engine.
OK thanks for clarifying. One day, one day, my dream will come true :-)