Disabling Instruction and Data Cache

[Uzair540]

Can anyone tell me how can I disable instruction and data Cache in BigCore configuration of rocket chip?

[tamood]

You may try dcache = None, icache = None

[hadirkhan10]

@tamood if you look at line 36 of RocketTile.scala it has two statements:

require(icache.isDefined)
require(dcache.isDefined)

failing to fulfil this requirement bombs the build process.

[hadirkhan10]

Which means there is not yet any support to build a more tiny or nano version of the core that does not even have caches inside.