regalloc2
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A new register allocator
The regalloc2 crate provides a good API (`VReg`, `PReg`, `Operand`, `Function`, etc) for interacting with a register allocator. It would be nice if other register allocator backends could be made...
As an alternative to spilling and reloading, a vreg value can sometimes be recomputed from other available values. There are two ways this can be supported in regalloc2: ## Simple...
Right now, regalloc2 uses an entity-component-system sort of pattern with toplevel `Vec`s of `LiveBundle`, `VRegData`, and the like, and newtype'd index wrappers like `LiveBundleIndex`, `VRegIndex`, etc. We have a whole...
It would be useful to be able to mark some blocks as "cold" which means that they are rarely taken cold paths. The register allocator should prefer placing spills and...
Right now, the allocator can panic if the client provides impossible constraints, such as requiring two different operands to be placed in the same `PReg`. While this represents a programming...
Two uses of the same vreg on the same instruction causes an assertion failure if one of them is `Stack` and the other is `Reg` or `FixedReg` since it results...
In [this comment](https://github.com/bytecodealliance/regalloc2/pull/1#pullrequestreview-742269939) it was suggested that we run Clippy and follow its lints. It seems that this is somewhat nontrivial as at least some of its lints [seem questionable...
Previously instructions that have multiple operands specifying the constraint `OperandConstraint::Reuse` would not work properly. Good examples of this are X86's `XCHG` and `XADD`, both of which require two `OperandConstraint::Reuses`. This...
Sadly due to how the code was structured, I needed to change the `Env' fields so basically everything that was used was changed as well. I did not benchmark anything...
The checker only checks for the correctness of the allocation dataflow but not for the debug locations output. Although the correctness of the debug locations output isn’t so critical, I...